Atotech
Enabling Interconnect Technologies that Transform Our World

Semiconductor devices are the foundation of our increasingly connected world, powering everything from artificial intelligence (AI) and high-performance computing (HPC) to autonomous vehicles and advanced communications. For decades, Moore's Law fueled industry progress through continuous transistor scaling. As traditional scaling approaches its physical and economic limits, however, innovation is increasingly shifting beyond the transistor.

To sustain performance growth, the industry is embracing heterogeneous integration and advanced packaging. Rather than relying on a single monolithic chip, advanced packages integrate multiple specialized dies into a unified system. This approach is becoming essential for AI, HPC, mobile, automotive and next-generation communications applications. Increasingly, future performance gains will depend as much on packaging innovation as on silicon innovation.

From Transistor Scaling to System Integration

The AI era is defined not only by more powerful algorithms, but by the infrastructure required to support them. System performance increasingly depends on how efficiently devices are integrated, interconnected, powered, cooled and manufactured at scale.

As Moore's Law slows, innovation is shifting toward advanced packaging and precision interconnect engineering.

Packaging is no longer a final assembly step. Packaging is performance

At the center of this transition is the interconnect stack, spanning multilayer PCBs, high-density interconnect (HDI) boards, package substrates, silicon interposers, GPUs and high-bandwidth memory (HBM). Signal integrity, thermal management, contamination control, dimensional accuracy and yield must all be optimized simultaneously to enable AI systems to scale.

Manufacturing Challenges in the AI Era

The increasing complexity of AI and HPC architectures introduces several key challenges:

• Growing package sizes and I/O density driven by larger HBM configurations and heterogeneous integration.

• Smaller interconnect geometries requiring ever-greater precision in routing, plating and bonding.

• More stringent requirements for reliability and contamination control.

• Rising thermal loads and power densities.

• Material compatibility and substrate warpage challenges.

• Increasing pressure to improve energy efficiency and sustainability.

• Greater design complexity spanning chip, package and system levels.

• The need to increase manufacturing yield while controlling costs.

As these factors become increasingly interdependent, optimizing individual process steps in isolation is no longer sufficient.

From Device Scaling to Interconnect Optimization

Future semiconductor performance gains will increasingly be driven by advances in interconnect technology.

Modern AI architectures rely on a hierarchy of interconnected structures spanning PCBs, package substrates, silicon interposers, memory stacks and advanced packaging. Success depends on simultaneously optimizing bandwidth, power delivery, thermal performance, contamination control, reliability and yield.

This reality is driving closer collaboration across the entire ecosystem, including materials suppliers, equipment manufacturers and semiconductor technology providers. Success increasingly depends on integrating expertise in materials science, laser processing, plating chemistry, plasma technologies, vacuum engineering, metrology, analytics and process control.

MKS refers to this system-level philosophy as Optimize the Interconnect℠.

Building on the company's Surround the Wafer® and Surround the Workpiece® strategies, Optimize the Interconnect℠ aligns materials, manufacturing equipment, photonics, laser technologies, vacuum solutions and process control into integrated manufacturing solutions. The goal is not to optimize individual steps, but to maximize the performance, reliability, scalability and yield of the complete interconnect architecture.

Building the AI Stack

At the system level, AI infrastructure relies on high-layer-count PCBs to distribute power and high-speed data through increasingly dense copper networks. As current densities and signal speeds rise, precision laser drilling, uniform copper plating and advanced process control become critical.

Within these board architectures, HDI technology enables increasingly dense routing and interconnection. Consistent surface treatment, metallization, laser processing and plating are essential to maintain reliability.

Package substrates provide the bridge between board-level routing and silicon-level precision. As I/O counts and HBM stack heights increase, overlay accuracy, warpage control and contamination-free processing become increasingly important.

At the heart of AI bandwidth scaling is the silicon interposer, connecting GPUs and stacked memory through ultra-fine interconnects including through-silicon vias (TSVs). As leading-edge architectures increasingly adopt copper-to-copper hybrid bonding, manufacturing demands increase further, requiring ultra-flat surfaces, atomically clean interfaces and highly controlled deposition environments.

At the top of the stack, GPUs and HBM towers operate under extreme power densities. Here, thermal management, thin-film precision and contamination-free processing directly influence performance, efficiency and long-term reliability.

Integration as Strategic Differentiation

Many companies contribute individual technologies to AI infrastructure, including production equipment, chemistries, laser systems, vacuum solutions, metrology and process control tools.

MKS differentiates itself through its ability to integrate and optimize across these domains.

Its advanced materials portfolio enables ultra-fine copper interconnect formation, diffusion barrier control and surface preparation for high-density routing and hybrid bonding. Its photonics technologies support precision via formation, material structuring and scalable manufacturing. Its vacuum solutions provide the pressure control, gas-flow management, plasma activation and contamination mitigation required for advanced packaging and thin-film processes.

By combining these capabilities, manufacturers can address complexity holistically rather than as a series of disconnected manufacturing steps.

As AI architecture becomes more sophisticated, yield and performance increasingly depend on the seamless coordination of multiple technologies. MKS's Optimize the Interconnect℠ approach provides a framework for aligning materials, equipment and process expertise into integrated manufacturing solutions.

Enabling the Future of AI Infrastructure

The next decade of AI growth will be driven by higher datacenter density, larger HBM stacks, more advanced packaging architectures and increasing demands for energy efficiency.

Glass substrates, panel-level packaging, photonics integration, thermal management and power delivery are all emerging as critical technology frontiers. Across each of these areas, precision at scale will be a key competitive differentiator.

MKS's role is to enable that precision across every layer of the AI hardware stack. By combining materials science, photonics innovation, laser processing, advanced manufacturing equipment and precision vacuum technologies, MKS helps manufacturers overcome growing challenges in density, thermal management, contamination control, reliability and yield.

AI does not scale on algorithms alone. It scales on infrastructure.

It scales on the invisible layers of copper, silicon, surface chemistry, laser processing, advanced packaging and vacuum-controlled environments that connect, power and cool the system.

As AI continues to transform industries and societies, MKS stands at the foundation of that transformation, enabling the interconnect technologies that power the infrastructure of intelligence.