Utilizing the Power of Data in Semiconductor Testing

Semiconductor Review | Wednesday, September 14, 2022

The data analytics continue to advance in product quality and parametric test in order to combine with new and subtle defect mechanisms in semiconductor testing

FREMONT, CA: New techniques are being created every day to gather, simplify, integrate, and analyse data sources and to extract from the relevant, usable intelligence to support decision-making and other processes. The design, production, and testing of semiconductors are a few of the areas where this is accurately valid.

According to conventional scaling of transistor critical dimensions, Moore's Law might be slowing down. The density of components in goods is rising quickly as engineers always find inventive ways to integrate more functionality into a single product, such as 3D manufacturing, multi-chip packing, stacked die, and buried power rails. Increased online shopping, work-from-home scenarios, and electrification of the transportation sector are all contributing to an unprecedented rise in semiconductor demand.

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Product quality and test cost are the two aspects of testing that are greatly impacted by these trends. The amount and complexity of testing and screening that must be done to guarantee low parts per billion test escape rates increases as a result of new and subtle fault mechanisms as well as the pressure to achieve ever-higher levels of quality. In turn, all of this requires additional testing time, which raises the price of the exam. To address these issues and keep testing costs in check without compromising the output quality or dependability of components, semiconductor suppliers are relying heavily on data analytics.

Dynamic Parametric Test

The parametric test, also known as the e-test or wafer acceptance test (WAT), is one of the earliest test procedures used on semiconductor devices. It is carried out both during and after wafer fabrication. Individual transistors, resistors, and other components built in the scribe lines are some of the structures being tested. Although these structures cover the majority of the scribe lines on the wafer, testing is normally only conducted at a few spots spread across the wafer surface.

Valuable information from the test readings is utilised to keep tabs on the health of the manufacturing process. When abnormalities are found, the material flow is normally stopped so that fabrication engineers can identify the root cause of the issue. In many cases, this calls for repeating material tests, gathering more data, and carrying out more manual analyses—all of which can disrupt fab operations and be expensive.

The dynamic parametric test (DPT) was developed to automate and expedite the resolution of these types of excursions. During parametric testing, a set of user-definable rules is established and checked using DPT on an Advantest V93000/SMU8 parametric tester with PDF Solutions Exensio software. Actions are taken right away to accelerate root-cause analysis and identification.

Production Test Edge Computing

Production testing comes after the parametric test. Devices are tested with a wafer probe or wafer sort while they are still on the wafer. Good dice go through a final or package test after being singulated and packaged. Other alternatives include burn-in, which involves testing devices for several hours at elevated voltage and/or temperature to accelerate early life failures, and system-level testing, which involves putting dice through a longer test that more closely resembles actual in-system operation.

Production tests have traditionally been a "one size fits all" concept, with the same set of tests being applied to each die for a specific product. To ensure that each die undergoes the "correct" tests, it is preferred that test content and execution be modified using data that is produced from the test processes. Adaptive testing is a procedure that provides efficient resource deployment for testing.

IC developers and manufacturers face greater challenges than ever in delivering devices on time, with the best quality, and for the lowest cost. This is due to the growth and diversification of semiconductor product data sources. In order to extract the insight required to modify manufacturing and test procedures in order to react to a constantly changing environment, they are turning to advanced data analytics. The test is crucial because it interacts with each device directly to extract and analyse the data required to monitor and manage the performance and quality of the product. To solve these issues, DPT and test edge computing are just two strategies that have been put into practice. As manufacturing and test data analytics continue to advance, the domain can anticipate witnessing more contemporary ideas.

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